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RISC-V SoC Subsystem

Pre-integrated subsystem IP bundling CPU cluster, interconnect and peripheral controllers.

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RISC-V SoC Subsystem
Cluster1 to 4 cores
BusAMBA compatible
ReferenceFPGA image
DocsIntegration manual

Key Features

  • Pre-verified bus interconnect
  • Integrated peripheral controllers
  • FPGA-ready reference platform

Typical Applications

Rapid prototypingSecurity islandsAI coprocessors

Distribution & Support

This product is available through our represented channel. Evaluation samples, technical documentation and environmental qualification data can be requested during the inquiry process. Our field application engineers assist with schematic review and integration questions.

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RISC-V CPU Core IP

Licensable 32-bit and 64-bit RISC-V processor cores with configurable cache and MMU options.

  • Configurable pipeline depth
  • Optional MMU and FPU
  • Silicon-proven verification suite
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